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sse4 vs avx

sse4a unsupported

20 Feb 2017 W tensorflow/core/platform/cpu_feature_guard.cc:45] The TensorFlow library wasn't compiled to use SSE4.1 instructions, but these are
Oracle Solaris Mnemonic Intel/AMD Mnemonic Description Reference blendpd BLENDPD.
27 Sep 2006 SSE4 now comes in 3 flavors: SSE4.1, SSE4.2, and SSE4a. All together, there are 54 instructions, 47 of which belong to SSE4.1, the remaining
28 Sep 2015 Computers with pre-SSE4.1 CPU instruction sets will not boot to a 64-bit OS and thus fail to install. You must use SSE 4.1 or higher. PC: Most
Intel SSE4 consists of 54 instructions. A subset consisting of 47 instructions, referred to as SSE4.1 in some Intel documentation,
9 Mar 2017 "The TensorFlow library wasn't compiled to use SSE3/SSE4.1/ instructions", "creating context when one is currently active", "Peer access not
2 Mar 2017 W tensorflow/core/platform/cpu_feature_guard.cc:45] The TensorFlow library wasn't compiled to use SSE4.1 instructions, but these are
SSE4.1 consists of 47 instructions that improve performance of media data manipulation: 2 Dword multiply instructions; 2 Single- and double-precision dot
22 Dec 2016 To summarize: AVX, SSE4.1, SSE4.2, MFA are different kinds of extended instruction sets on X86 CPUs. Many contain optimized instructions
bazel build -c opt --copt=-mavx --copt=-mavx2 --copt=-mfma --copt=-msse4.1 in this discussion: How to compile Tensorflow with SSE4.2 and AVX instructions?
     

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